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 Product Specification
PE4273
Product Description
The PE4273 RF Switch is designed for the TV tuner, PCTV, set top box, DTV, DVR and general broadband applications. This device offers industry leading broadband linearity, 1.5 kV ESD tolerance and a simple CMOS interface. It offers a simple alternative solution to pin diode and mechanical relay switches. The PE4273 SPDT Broadband RF Switch is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. SPDT Broadband UltraCMOSTM DC - 3 GHz RF Switch Features
* Single-pin or complementary CMOS logic
control inputs
* High ESD tolerance of 1.5 kV * Low insertion loss: 0.50 dB at 1000 MHz,
0.65 dB at 2000 MHz
* Isolation of 34.5 dB at 1000 MHz, 25 dB at
2000 MHz
* Typical input 1 dB compression point of
+32 dBm Figure 1. Functional Diagram
RFC
* Ultra-small SC-70 package
Figure 2. Package Type
6-lead SC-70
RF2
RF1
CMOS Control Driver
V1
V2
Table 1. Electrical Specifications @ +25 C, VDD = 3 V (ZS = ZL = 75 )
Parameter
Operation Frequency Insertion Loss Isolation (RFC - RF1/RF2) Isolation (RF1 - RF2) Return Loss `ON' Switching Time3 `OFF' Switching Time Video Feedthrough
2,3 3 3 1
Conditions
DC - 3000 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 50% CTRL to 0.1 dB of final value, 1 GHz 50% CTRL to 25 dB isolation, 1 GHz
Min
DC
Typical
Max
3000
Units
MHz dB dB dB dB dB dB dB dB
0.50 0.65 32.5 23 38.5 26 34.5 25 40.5 28 18.5 14 0.725 0.625 <2
0.60 0.75
1.5 1.3
s s mVpp dBm dBm
Input 1 dB Compression Input IP33 Notes:
1000 MHz 1000 MHz, 19 dBm input power
30
32 53
1. Device linearity will begin to degrade below 10 MHz. 2. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth. 3. Measured in a 50 system.
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11
PE4273
Product Specification
Figure 3. Pin Configuration (Top View)
pin 1
Table 4. DC Electrical Specifications
Parameter Min
2.7
Typ
3.0 8
Max
3.3 50
Units
V A V
RF1 GND RF2
1
6
V2 RFC V1
VDD Power Supply Voltage IDD Power Supply Current (V1 = 3V, V2= 3V) Control Voltage High Control Voltage Low
273
2
5
3
4
0.7x V DD 0.3x VDD
V
Table 2. Pin Descriptions
Pin No.
1 2 3 4 5
Latch-Up Avoidance
Description
Pin Name
RF1 GND RF2 V1 RFC RF Port14
Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3.
Ground connection. Traces should be physically short and connected to ground plane for best performance. RF Port24 Switch control input, CMOS logic level. RF Common4 This pin supports two interface options: Single-pin control mode. A nominal 3volt supply connection is required. Complementary-pin control mode. A complementary CMOS control signal to V1 is supplied to this pin.
6
V2
Figure 4. Maximum Operating Input Power5
Note: 4. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC.
Table 3. Absolute Maximum Ratings
Symbol
VDD VI TST TOP PIN
Parameter/Conditions
Power supply voltage Voltage on any input Storage temperature range Operating temperature range Input power (50) ESD Voltage (HBM, ML_STD 883 Method 3015.7) ESD Voltage (MM, JEDEC, JESD22-A114-B)
Min
-0.3 -0.3 -65 -40
Max
4.0 VDD+ 0.3 150 85 +34 1500 100
Units
V V C C dBm V V Note: 5. Operating within DC limits (Table 4).
VESD
Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability.
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 11
Document No. 70-0174-04 UltraCMOSTM RFIC Solutions
PE4273
Product Specification
Table 5. Single-pin Control Logic Truth Table
Control Voltages
Pin 6 (V2) = VDD Pin 4 (V1) = High Pin 6 (V2) = VDD Pin 4 (V1) = Low
Control Logic Input The PE4273 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 4) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection (pin 6). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins V1 and V2 (pins 4 & 6), that can be directly driven by +3-volt CMOS logic or a suitable Processor I/O port. This enables the PE4273 to operate in positive control voltage mode within the PE4273 operating limits.
Signal Path
RFC to RF1
RFC to RF2
Table 6. Complementary-pin Control Logic Truth Table
Control Voltages
Pin 6 (V2) = Low Pin 4 (V1) = High Pin 6 (V2) = High Pin 4 (V1) = Low
Signal Path
RFC to RF1
RFC to RF2
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 11
PE4273
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4273 SPDT switch. The RF common port is connected through a 75 transmission line to the bottom F connector, J2. Port 1 and Port 2 are connected through 75 transmission lines to two F connectors on either side of the board, J3 and J1. A through transmission line connects F connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.021", trace gaps of 0.030", dielectric thickness of 0.028", copper thickness of 0.0021" and r of 4.3. J6 and J7 provide a means for controlling the DC inputs to the device. The lower left header (J6) is connected to the device V1 input. The lower right header (J7) is connected to the device V2 input. Series resistors (R1 and R2) are provided to reduce the package resonance between RF and DC lines. Footprints for decoupling capacitors (100 pF) are provided on both V1 and V2 traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance.
Figure 5. Evaluation Board Layouts
Peregrine Specification 101/0245
Figure 6. Evaluation Board Schematic
Peregrine Specification 102/0311
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 11
Document No. 70-0174-04 UltraCMOSTM RFIC Solutions
PE4273
Product Specification
Typical Performance Data Figure 7. Isolation: RF1 - RF2 @ 25 C Figure 8. Isolation: RF1 - RF2 @ 3.0 V
Figure 9. Isolation: RFC - RF1/RF2 @ 25 C
Figure 10. Isolation: RFC - RF1/RF2 @ 3.0 V
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 11
PE4273
Product Specification
Typical Performance Data Figure 11. Insertion Loss @ 25 C Figure 12. Insertion Loss @ 3.0 V
Figure 13. Return Loss: RF1/RF2 @ 25 C
Figure 14. Return Loss: RF1/RF2 @ 3.0 V
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 11
Document No. 70-0174-04 UltraCMOSTM RFIC Solutions
PE4273
Product Specification
Typical Performance Data Figure 15. Return Loss: RFC/RF1 @ 25 C Figure 16. Return Loss: RFC/RF1 @ 3.0 V
Figure 17. Return Loss: RFC/RF2 @ 25 C
Figure 18. Return Loss: RFC/RF2 @ 3.0 V
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 11
PE4273
Product Specification
Typical Performance Data Figure 19. Input 1 dB Compression and IIP3
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 11
Document No. 70-0174-04 UltraCMOSTM RFIC Solutions
PE4273
Product Specification
Figure 20. Package Drawing
6-lead SC-70
1.80 2.20 0.65 BSC
0.10 0.30 1.80 2.40 1.15 1.35
0.15 0.30
0.10 0.40
0.10 0.18
0.80 1.00
0.80 1.10
0.00 0.10
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 11
PE4273
Product Specification
Figure 21. Tape and Reel Specifications
Pin 1
Tape Feed Direction
Table 7. Ordering Information
Order Code
4273-01 4273-02 4273-00 4273-51 4273-52
Part Marking
273 273 PE4273-EK 273 273
Description
PE4273-06SC70-7680A PE4273-06SC70-3000C PE4273-06SC70-EK PE4273G-06SC70-7680A PE4273G-06SC70-3000C
Package
6-lead SC-70 6-lead SC-70 Evaluation Kit Green 6-lead SC-70 Green 6-lead SC-70
Shipping Method
7680 units / Canister 3000 units / T&R 1 / Box 7680 units / Canister 3000 units / T&R
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 11
Document No. 70-0174-04 UltraCMOSTM RFIC Solutions
PE4273
Product Specification
Sales Offices
The Americas Peregrine Semiconductor Corporation
9450 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499
North Asia Pacific Peregrine Semiconductor K.K.
Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213
Europe Peregrine Semiconductor Europe
Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173
Peregrine Semiconductor, Korea
#B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305
South Asia Pacific Peregrine Semiconductor, China
Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652
Space and Defense Products
Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp.
Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice).
Document No. 70-0174-04 www.psemi.com
(c)2005-2006 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 11


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